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| www..com STA2059 IN VEHICLE NAVIGATION/TELEMATICS SYSTEM ON CHIP DATA BRIEF 1 FEATURES ARM720 MCU - 32-bit RISC MCU with 3-stage pipeline. - Max. CPU frequency ~ 68 MHz. - Fully instructions compatible with the ARM7 family of processors. - 8 KByte Instruction + Data cache, 4-way setassociative. - Write buffer de-coupling CPU from system memory during write operations. - MMU for virtual to physical address mapping and memory protection. Figure 1. Package PQFP208 (28x28x3.4mm) Table 1. Order Codes Part Number STA2059 Package PQFP208 Memories - 16 KBytes Program RAM Memory - 4 KBytes on-chip boot ROM Digital Audio - External SDRAM Interface for up to 128 - 24-bit Audio Digital to Analog converter Mbytes SDRAM. .com DataShee (ADAC) with digital volume control - External Memory Interface (EMI) for up to 8 - Enhanced Serial Audio Interface (ESAI) supMbytes SRAM, Flash, ROM. porting I2S format - ATAPI interface supporting PIO4 mode 6 Communications Interfaces Nested interrupt controller - USB slave interface 1.1 compliant - Fast interrupt handling with multiple vectors - C-CAN module compliant with the CAN spec- 32 vectors with 16 IRQ priority levels ification V2.0 part B (active). - 2 maskable FIQ sources - Two High-Speed Universal Asynchronous Clock, Reset and Supply Management Receiver Transmitter (UART) for full-duplex - 3.3 V 5% operating supply range for Input/ asynchronous communication. Output, AD, ADAC. - Two Buffered Serial Peripheral Interfaces - 1.8 V 5% operating supply range for core (BSPI) for full-duplex, synchronous, commusupply, PLL, RTC and 32 kHz osc. nications with external devices, master or - Internal system clocks generated by fully inslave operation. ternal PLL A/D Converter - Power management providing different oper- 11-bit resolution Analog/Digital Converter ating modes: RUN, SLEEP, STOP, STANDsupporting 4 multiplexed inputs at up to 950 BY. Hz sampling rate. 35 I/O ports Development Tools Support - 35 multifunctional bidirectional I/O lines - 5-pin JTAG port (IEEE 1149.1 Standard) - 5 ports with interrupt capability Package 3 Timers - 208-pin PQFP208 package. - Two 16-bit programmable Timer modules - -40C to 85C operating temperature range. with prescaler (fAPB divided by 1 to 256) driv.com en from internal selectable clock (oscillator or CPU clock), output compare and input capture functions. - 16-bit Watchdog Timer with 8-bit prescaler September 2004 This is preliminary information on a new product now in development. Details are subject to change without notice. Rev. 1 1/4 www..com STA2059 2 SYSTEM BLOCK DIAGRAM The Figure 2 gives an overview of the complete processor, showing how ARM720T microcontroller and their peripherals are interfaced. Figure 2. Block Diagram VDD VDD3 TDI TDO TMS TCK TRST VDD3P VSSP VDD3D VSSD VDDPLL VSSPLL VDDRTC VSS AVDD AGND IREF B GFIL POWER SUPPLY MiClk MiClkEn Mid[0..31] Mia[0..13] MiCsN[0..3] RAS CAS MiWeN MiBls[0..3] Edata[0..15]/DD[0..15] Eadd[1..3]/DA[0..2] Eadd[4..21] Erdn/Diorn Ewr0n/Diown Ewr1n Ecs0n ICs0n ICs1n Iordy Irq AHB I/F Test/Emu Port APB I/F AHB I/F APB I/F AHB I/F APB I/F SDRAMC EMI ARM720 Core ATAPI APB I/F ASB Slave I/F S-APB APB I/F DATA RAM (4k x 32) AHB Bridge AHB Master I/F A r b i t e r AHB ROM (1k x 32) ASync. APB Bridge WDG GPIO CAN RAM APB I/F t4U.com .com Sync. APB Bridge Port7 Port6 CAN Port2 EFT1..2 UART1..2 BSPI0..1 CANRX CANTX DataShee APB I/F ECLK1 AHB A-APB APB I/F RxD[2..1] TxD[2..1] APB I/F PLL AHB Master I/F RCCU APB I/F EIC APB I/F APB I/F DMA Ctrl MISO[0..1] MOSI[0..1] SCK[0..1] USBCK USB RAM APB I/F USB ADC Port1 AN0 AN1 AN2 AN3 (P1.3-0) S-APB APB I/F APB I/F APB I/F APB I/F APB I/F APB I/F RTC GPIO ESAI WIU GPIO ADAC RTCRST RSTIN 32 kHz OSC SC2 SC1 SC0 SRD STD0 SCK Port3 Port4 H8DAC OSCOUT OSCIN VDDRTC dedicated suppl y EXT_BOOT STOP_REQ EINT0 EINT1 EINT2 EINT3 EINT4 ECS1n Eready OUTPL OUTPR (P1.4-7) .com 2/4 APB I/F Port1 www..com STA2059 Table 2. Revision History Date September 2004 Revision 1 First Issue Description of Changes t4U.com .com DataShee .com 3/4 www..com STA2059 t4U.com .com Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com .com 4/4 |
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